Energy Study for 28 nm Fully Depleted Silicon-On-Insulator Devices

Rida Kheirallah 1 Gilles Ducharme 2 Nadine Azemard 1
1 SmartIES - Smart Integrated Electronic Systems
LIRMM - Laboratoire d'Informatique de Robotique et de Microélectronique de Montpellier
Abstract : In this paper, we propose to study the impact of 28 nm FDSOI technology on energy study. In fact, due to the effects of the Moore's law, the process variations in current technologies are increasing and have a major impact on power and performance which results in parametric yield loss. Due to this, process variability and the difficulty of modeling accurately transistor behavior impede the dimensions scaling benefits. The Fully Depleted Silicon-On-Insulator (FDSOI) technology is one of the main contenders for deep submicron devices as they can operate at low voltage with superior energy efficiency compared with bulk CMOS. In this paper, we study the static energy on 28 nm FDSOI devices to implement sub-threshold circuits. Study of delay versus static power trade-off reveals the FDSOI robustness with respect to process variations.
Type de document :
Article dans une revue
Journal of Low Power Electronics, American Scientific Publishers, 2016, 12 (1), pp.58-63. 〈10.1166/jolpe.2016.1420〉
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https://hal.umontpellier.fr/hal-01825073
Contributeur : Gilles Ducharme <>
Soumis le : jeudi 28 juin 2018 - 09:13:47
Dernière modification le : mardi 23 octobre 2018 - 14:48:03

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Rida Kheirallah, Gilles Ducharme, Nadine Azemard. Energy Study for 28 nm Fully Depleted Silicon-On-Insulator Devices. Journal of Low Power Electronics, American Scientific Publishers, 2016, 12 (1), pp.58-63. 〈10.1166/jolpe.2016.1420〉. 〈hal-01825073〉

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